Original Article
  • An Empirical Formulation for Predicting the Thickness of Multilayer PCB
  • Nam-Hoon Kim*, Gwan-Hee Han*, Min-Su Lee**, Hyun-Ho Kim**, Kwang-Bok Shin*†

  • * Department of Mechanical Engineering, Hanbat National University
    ** Korea Packaging Integration Association

  • 다층 PCB의 두께 예측을 위한 실험식 도출 연구
  • 김남훈* · 한관희* · 이민수** · 김현호** · 신광복*†

  • This article is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/by-nc/4.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited.

References
  • 1. Cho, S.H., Jung, H.I., and Bae, O.C., “Numerical Analysis on the Design Variables and Thickness Deviation Effects on Warpage of Substrate for FCCSP,” Journal of the Microelectronics & Packaging Society, Vol. 19, No. 3, 2012, pp. 57-62.
  •  
  • 2. Kim, C.G., and Lee, S.S., “Ultra-High-Speed PCB Design Methods,” Institute of Korean Electrical and Electronics Engineers, Vol. 22, No. 3, 2018, pp. 882-885.
  •  
  • 3. Oh, S.H., Kim, J.G., Park, K.H., Im, C.W., and Kang, K.I., “A PCB Material Selection, Test and EMI Simulation for 10Gbps High Speed IO Data Processing Board,” KSAS 2010 Conference, 2010, pp. 903-906.
  •  
  • 4. Cho, S.H., Jang, J.Y., Kim, J.C., Kang, S.W., Sung, I., and Bae, K.Y., “A Study on Heat Transfer Characteristics of PCBs with a Carbon CCL,” Journal of the Microelectronics and Packaging Society, Vol. 22, No. 4, 2015, pp. 37-46.
  •  
  • 5. Jiru, M., Guozheng, L., and Lei, Z., “Study on Epoxy Matrix Modified with Poly(2,6-dimethyl-1,4-phenylene ether) for Application to Copper Clad Laminate,” Composites Science and Technology, Vol. 62, No. 6, 2002, pp. 783-789.
  •  
  • 6. Kim, S.M., Ku, T.W., Song, W.J., and Kang, B.S., “Experimental Study on the Improvement of Flexural Strength in Slim Multi-Layer Printed Circuit Boards,” Proceedings of the KSME Conference, 2007, pp. 321-325.
  •  
  • 7. Yoon, I.S., “Warpage Improvement of PCB with Material Properties Variation of Core,” Journal of the Microelectronics & Packaging Society, Vol. 13, No. 2, 2006, pp. 1-7.
  •  
  • 8. Kim, C.G., and Lee, S.S., “Ultra-High-Speed PCB Design Methods”, Journal of IKEEE, Vol. 22, No. 3, 2018, pp. 882-885.
  •  
  • 9. Lee, S.H., and Kim, S.K., “Optimal Design of Dummy Patterns for Minimizing PCB Warpage,” Transactions of the KSME, A, Vol. 33, No. 6, 2009, pp. 577-583.
  •  
  • 10. Yoon, D.H., Cho, M.G., and Lin, C.H., “Implementation of Multi-layer PCB Design Simulator for Controlled Impedance,” Journal of the Institute of Electronics and Information Engineers, Vol. 48, No. 12, 2011, pp. 73-81.
  •  

This Article

Correspondence to

  • Kwang-Bok Shin
  • Department of Mechanical Engineering, Hanbat National University

  • E-mail: shin955@hanbat.ac.kr